VLSI System Design
On this page
Overview
Things have changed tremendously since the first transistor was built. The field of electronics has seen tremendous morphological changes. The Integrated Circuit brought in a new trend in the field of microelectronics, leading to the miniaturisation of a lot of components: mobiles, computers, laptops, and more devices in the digital world. This industry has seen ever growing which has led to extensive research on increasing the speed, efficiency and properties of the Integrated Circuit chip while decreasing its size. Integrated Chip design is a niche area of expertise for young engineers. The new challenge is the distinction between the computer-simulated circuit and the semiconductor. This course enhances students’ to develop VLSI skills sets to overcome these challenges. On completing this course, students can explore opportunities in the field of IC design as Digital Designers, FPGA design engineers, layout design engineers, ASIC design engineers, or verification engineers. |
Objective
|
Details
Course Duration
3 Months
Classes
Monday — Friday
Batch Schedule
Batch 1 — January to March
Batch 2 — June to August
Batch 3 — September to November
Who should attend?
Graduates and Postgraduates from Electronics & Communication, Electrical & Electronics, Telecommunication Engineering.
Admissions
Application Process
|
Fees & Scholarships
Registration Fee: Rs. 2,000/- (Nonrefundable)
Tuition Fee: Rs. 27,000/-
- The fees may be paid in cash / DD at the University, The DDs must be drawn in favour of “M. S. Ramaiah University of Applied Sciences payable at Bangalore”
Downloads
Admission Application Form
pdf
|
311.5 KB
Contact
- Manager - Training
- Murali R
- Phone
- 080 4906 5555
- email hidden; JavaScript is required