DSP Algorithms and Architectures

On this page


What will you learn?

Introduction: Digital Signal Processing (DSP) and DSP systems, DSP applications, DSP algorithms and their structure – Regular memory access, high throughput requirements, need for high precision and dynamic range, limited executable size and data memory size, DSP processors and need for DSP processors, TMS320C6000 family architecture, Numeric Representations and Arithmetic: Numeric representation and arithmetic for high precision and dynamic range, Fixed-point vs. floating-point, Native data word width, Extended precision, Data Path: Fixedpoint and floating-point data paths, Signal Scaling: Dynamic range estimation, Scale transform, Data Dependency: Data dependency in DSP algorithms, Data Dependency Graphs (DDGs), Utility of DDGs for DSP algorithms, Memory Architectures, Addressing modes, Instruction Sets, Pipelining, Looping and Branching, Interrupts and Exceptions, Peripherals: Serial ports, Parallel ports, GPIO, Host ports, Communications ports, SERDES, Timers, External interrupts, DMA, External memory interface, Code optimization: Code profiling, User and compiler optimisation, Use of DDG for code optimisation, Loop transformations (unrolling, swapping, tiling), On-Chip Debugging, Power Management, Software Development Environment: Introduction, Software Development Tools: Compiler, Assembler, Linker, DSK 2. Tools: C, MATLAB, Code Composer Studio, TMS32067xx DSK

Batch Size

No Minimum

Course Material


Module Delivery

Fast Track — 4 Hrs / Day
Regular Track — 2 Hrs / Day


50 Hrs



MTPs are open to engineering graduates/​diploma holders, engineering students and working professionals with an appropriate background.

Application Process

Admission open around the year

Fees & Scholarships


Training Manager
Murali R
080 49065555
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