What will you learn?

1. Semiconductor device physics: Introduction, concepts of
basic semiconductors, operation of diode and its terminal
characteristics, analysis of diodes, physical structure and
operation of BJT, characteristics of BJT, small signal models
and second order effects. Case study.
2. MOS transistor theory: Introduction, structure, operation
of enhancement and depletion type MOS transistor,
current-voltage characterization of MOS transistor, biasing
of MOS transistor, small signal model of MOS transistor,
second order effect- body effect, channel length
modulation, subthreshold effect, hot electron effect,
tunnelling, punch through. MOS transistor capacitances,
model parameters, different level of MOS model equations,
modelling of MOS transistors using SPICE and scaling of
MOS transistors. Case study of modelling MOS devices and
extracting model parameters.
3. CMOS inverter design: Introduction, types MOS inverter,
resistive load inverter, depletion load inverter, CMOS
inverter, design of CMOS inverter, DC (static) characteristic
analysis — voltage transfer characteristic and noise margin.
Transient (dynamic) analysis — propagation delay, rise time
and fall time calculation. CMOS inverter static and dynamic
power, CMOS inverter load capacitance and
interconnection parasitic. Case study of CMOS inverter
design for noise margin, speed, power and timing
4. Combinational and sequential CMOS logic circuits:
Introduction, CMOS logic circuits, complex logic circuits,
clocked CMOS logic, pass transistor logic, CMOS
transmission gates, problems of charge sharing,
precharging techniques. Behaviour of bistable elements,
timing metrics, SR latch and flip-flop circuits, mux based
latches, clocked latch and flip-flop circuit. Case study of
combinational and sequential circuits for timing, area and
power
5. Logical effort: Introduction, transistor sizing, delays in
CMOS logic gates, fan-in and fan-out consideration, fast
complex gate techniques, computing of logical effort, path
and branch effort, multistage delay and best stage effort.
Case study of CMOS circuit design using logical effort.
6. Memory design : Introduction, need for memories,
classification of memories, Dynamic Random Access
Memory (DRAM) and Static Random Access Memory
(SRAM), memory architectures, 6T SRAM memory cell
architecture, peripheral memory circuitry — sense amplifier,
80Hrs Rs.12000.00
read/​write circuitry, bit line precharge circuitry, row and
column decoders and memory timing.
7. Data path subsystem: Introduction, arithmetic logic
circuits, classification of adders, design of mirror adder,
ripple carry adder, Manchester carry chain adder, carry skip
adder, comparison of adders, multipliers and shifters. Case
studies of data path subsystems.
8. Low Power CMOS design: Introduction, power dissipation,
static and dynamic power dissipation, techniques for
reduction of power dissipation, low power design through
voltage scaling, estimation and optimization of switching
activity, reduction of switched capacitance. Case study of
optimizing power in CMOS circuits.
9. Tools used: Synopsys HSPICE, Cadence Virtuoso, Nanosim,
Cadence Pspice, LTspice, Microwind, HSIM

Batch Size

No Minimum

Course Material

Provided

Module Delivery

Fast Track — 4 Hrs / Day
Regular Track — 2 Hrs / Day

Duration

80 Hrs